01-Nov-2018 Dante Clocking Model 5401

New Model 5401 Sync FPGA Firmware

Time flies and it’s already been about a month since we released version 1.01 of the Sync FPGA firmware for the Model 5401 Dante Master Clock. We recommend that all Model 5401 units be updated as soon as possible. Loading this update is not critical but is highly recommended.

Updating is done using the unit’s internal FTP (file transfer protocol) client which establishes a connection to the Studio Technologies’ FTP server. Assuming that network access to the “outside world”

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13-Sep-2018 AES67 Model 5401 ST 2110

Supporting PTP v2 (AES67 and ST 2110) with the Model 5401

Updated 21-Dec-2020

The Model 5401 Dante Master Clock was initially designed for use in applications that utilized devices running “native” Dante. To support the master timing needs of these devices Precision Time Protocol Version 1 (IEEE-1588-2002 or “PTP v1”) was implemented. The unit’s PTP v1 implementation functions very well, including in redundant Dante applications. (Independent Ethernet networks connected to the Primary and Secondary Ethernet ports on the back panel of the Model 5401.) Even in large installations with literally hundreds of Dante devices,

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06-Sep-2018 Dante Clocking Model 5401

Using Two Model 5401 Dante Master Clocks for Redundant Operation

The Model 5401 Dante Master Clock has proven to be a solid product that’s found successful use in the field. But trying to use two units on a single local are network to achieve redundant master clock operation currently has one limitation that’s worth noting.

In the Dante Controller software application both Model 5401 units will, by default, appear as Preferred Master and allow an external sync reference. Dante will automatically select one of the units to be the active clock master.

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